Teaching

Fall 2017: LabVIEW Communication Tutorials

• Smart video streaming project [slides]
  

• Introduction to LabVIEW Communication (joint work with Simon Yau)
  

  • Case structure for scheduling policies [sample code]
    

  • Host queues: enqueue and dequeue [sample code]
    

  • Host queue switching [sample code]
    

  • Open FPGA targets and use FPGA FIFOs [sample code]
    

  • FPGA FIFO switching [sample code]
    

  • Read/Write FPGA control [sample code]
    

Fall 2016: Lab Sections of Introduction to Digital Systems Design

• Lab 1: Digital Logic Gates [slides]
  

• Lab 2: Inverter Characteristics and the Ring Oscillator [slides]
  

• Lab 3: Logic Minimization with Karnaugh Maps [slides]
  

• Lab 4: Rudimentary Adder Circuits [slides]
  

• Lab 5: Simple Arithmetic Logic Unit [slides]
  

• Lab 6: Introduction to Logic Simulation and Verilog [slides]
  

• Lab 7: Introduction to Behavioral Verilog and Logic Synthesis [slides]
  

• Lab 8: Introduction to Sequential Logic [slides]
  

• Lab 9: Counters, Clock Dividers, and Debounce Circuits [slides]
  

• Lab 10: An Introduction to High-Speed Addition [slides]
  

• Lab 11: A Simple Digital Combination Lock [slides]
  

• Lab 12: The Traffic Light Controller Lab [slides]